Modeling Cache Sharing on Chip Multiprocessor Architectures

Pavlos Petoumenos, Georgios Keramidas, Håkan Zeffer, Stefanos Kaxiras, Erik Hagersten. Modeling Cache Sharing on Chip Multiprocessor Architectures. In Proceedings of the 2006 IEEE International Symposium on Workload Characterization, IISWC 2006, October 25-27, 2006, San Jose, California, USA. pages 160-171, IEEE, 2006. [doi]

@inproceedings{PetoumenosKZKH06,
  title = {Modeling Cache Sharing on Chip Multiprocessor Architectures},
  author = {Pavlos Petoumenos and Georgios Keramidas and Håkan Zeffer and Stefanos Kaxiras and Erik Hagersten},
  year = {2006},
  doi = {10.1109/IISWC.2006.302740},
  url = {http://dx.doi.org/10.1109/IISWC.2006.302740},
  tags = {caching, modeling, architecture},
  researchr = {https://researchr.org/publication/PetoumenosKZKH06},
  cites = {0},
  citedby = {0},
  pages = {160-171},
  booktitle = {Proceedings of the 2006 IEEE International Symposium on Workload Characterization, IISWC 2006, October 25-27, 2006, San Jose, California, USA},
  publisher = {IEEE},
}