Parallelized Side-Channel Attack Resisted Scalar Multiplication Using q-Based Addition-Subtraction k-Chains

Kittiphop Phalakarn, Kittiphon Phalakarn, Vorapong Suppakitpaisarn. Parallelized Side-Channel Attack Resisted Scalar Multiplication Using q-Based Addition-Subtraction k-Chains. In Fourth International Symposium on Computing and Networking, CANDAR 2016, Hiroshima, Japan, November 22-25, 2016. pages 140-146, IEEE, 2016. [doi]

@inproceedings{PhalakarnPS16-0,
  title = {Parallelized Side-Channel Attack Resisted Scalar Multiplication Using q-Based Addition-Subtraction k-Chains},
  author = {Kittiphop Phalakarn and Kittiphon Phalakarn and Vorapong Suppakitpaisarn},
  year = {2016},
  doi = {10.1109/CANDAR.2016.0035},
  url = {http://doi.ieeecomputersociety.org/10.1109/CANDAR.2016.0035},
  researchr = {https://researchr.org/publication/PhalakarnPS16-0},
  cites = {0},
  citedby = {0},
  pages = {140-146},
  booktitle = {Fourth International Symposium on Computing and Networking, CANDAR 2016, Hiroshima, Japan, November 22-25, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-2655-5},
}