Laurence Pierre. VHDL Description and Formal Verification of Systolic Multipliers. In David Agnew, Luc J. M. Claesen, Raul Camposano, editors, Computer Hardware Description Languages and their Applications, Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications - CHDL 93, sponsored by IFIP WG10.2 and in cooperation with IEE. Volume A-32 of IFIP Transactions, pages 225-242, North-Holland, 1993.
@inproceedings{Pierre93,
title = {VHDL Description and Formal Verification of Systolic Multipliers},
author = {Laurence Pierre},
year = {1993},
researchr = {https://researchr.org/publication/Pierre93},
cites = {0},
citedby = {0},
pages = {225-242},
booktitle = {Computer Hardware Description Languages and their Applications, Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications - CHDL 93, sponsored by IFIP WG10.2 and in cooperation with IEE},
editor = {David Agnew and Luc J. M. Claesen and Raul Camposano},
volume = {A-32},
series = {IFIP Transactions},
publisher = {North-Holland},
isbn = {0-444-81641-0},
}