A simplified gate pulse generation technique for modified multilevel DC-link inverter

Naresh K. Pilli, Rahul K. Meena, Santosh K. Singh. A simplified gate pulse generation technique for modified multilevel DC-link inverter. In 2017 IEEE Industry Applications Society Annual Meeting, Cincinnati, OH, USA, October 1-5, 2017. pages 1-6, IEEE, 2017. [doi]

Authors

Naresh K. Pilli

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Rahul K. Meena

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Santosh K. Singh

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