Marc Pons, Christoph Thomas Müller, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi. A 0.5 V 2.5 μW/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13nW/kB SRAM Retention in 55nm Deeply-Depleted Channel CMOS. In IEEE Custom Integrated Circuits Conference, CICC 2019, Austin, TX, USA, April 14-17, 2019. pages 1-4, IEEE, 2019. [doi]
@inproceedings{PonsMRNEBTTT19,
title = {A 0.5 V 2.5 μW/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13nW/kB SRAM Retention in 55nm Deeply-Depleted Channel CMOS},
author = {Marc Pons and Christoph Thomas Müller and David Ruffieux and Jean-Luc Nagel and Stéphane Emery and Andreas Burg and Shuuji Tanahashi and Yoshitaka Tanaka and Atsushi Takeuchi},
year = {2019},
doi = {10.1109/CICC.2019.8780199},
url = {https://doi.org/10.1109/CICC.2019.8780199},
researchr = {https://researchr.org/publication/PonsMRNEBTTT19},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {IEEE Custom Integrated Circuits Conference, CICC 2019, Austin, TX, USA, April 14-17, 2019},
publisher = {IEEE},
isbn = {978-1-5386-9395-7},
}