Design and VLSI implementation of a novel concurrent 16-bit multiplier-accumulator for DSP applications

D. V. Poornaiah, R. Haribabu, M. Omair Ahmad. Design and VLSI implementation of a novel concurrent 16-bit multiplier-accumulator for DSP applications. In IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '93, Minneapolis, Minnesota, USA, April 27-30, 1993. pages 385-388, IEEE Computer Society, 1993. [doi]

Authors

D. V. Poornaiah

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R. Haribabu

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M. Omair Ahmad

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