Dhiraj K. Pradhan, Magdy S. Abadir, Mauricio Varea. Recent Advances in Verification, Equivalence Checking and SAT-Solvers. In 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India. pages 14, IEEE Computer Society, 2005. [doi]
@inproceedings{PradhanAV05,
title = {Recent Advances in Verification, Equivalence Checking and SAT-Solvers},
author = {Dhiraj K. Pradhan and Magdy S. Abadir and Mauricio Varea},
year = {2005},
url = {http://csdl.computer.org/comp/proceedings/vlsid/2005/2264/00/22640014.pdf},
researchr = {https://researchr.org/publication/PradhanAV05},
cites = {0},
citedby = {0},
pages = {14},
booktitle = {18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India},
publisher = {IEEE Computer Society},
isbn = {0-7695-2264-5},
}