RST cache memory design for a highly coupled multiprocessor system

Cosimo Antonio Prete. RST cache memory design for a highly coupled multiprocessor system. IEEE Micro, 11(2):16-19, 1991. [doi]

@article{Prete91,
  title = {RST cache memory design for a highly coupled multiprocessor system},
  author = {Cosimo Antonio Prete},
  year = {1991},
  doi = {10.1109/40.76618},
  url = {http://doi.ieeecomputersociety.org/10.1109/40.76618},
  researchr = {https://researchr.org/publication/Prete91},
  cites = {0},
  citedby = {0},
  journal = {IEEE Micro},
  volume = {11},
  number = {2},
  pages = {16-19},
}