A parallel algorithm, architecture and FPGA realization for high speed determination of the complete visibility graph for convex objects

T. K. Priya, K. Sridharan. A parallel algorithm, architecture and FPGA realization for high speed determination of the complete visibility graph for convex objects. Microprocessors and Microsystems, 30(1):1-14, 2006. [doi]

@article{PriyaS06,
  title = {A parallel algorithm, architecture and FPGA realization for high speed determination of the complete visibility graph for convex objects},
  author = {T. K. Priya and K. Sridharan},
  year = {2006},
  doi = {10.1016/j.micpro.2005.02.002},
  url = {http://dx.doi.org/10.1016/j.micpro.2005.02.002},
  tags = {completeness, architecture, graph-rewriting, rewriting},
  researchr = {https://researchr.org/publication/PriyaS06},
  cites = {0},
  citedby = {0},
  journal = {Microprocessors and Microsystems},
  volume = {30},
  number = {1},
  pages = {1-14},
}