Architectural Comparison of Analog and Digital Duty Cycle Corrector for High Speed I/O Link

Leneesh Raghavan, Ting Wu. Architectural Comparison of Analog and Digital Duty Cycle Corrector for High Speed I/O Link. In VLSI Design 2010: 23rd International Conference on VLSI Design, 9th International Conference on Embedded Systems, Bangalore, India, 3-7 January 2010. pages 270-275, IEEE, 2010. [doi]

Authors

Leneesh Raghavan

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Ting Wu

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