Soft Error Reliability Improvement of Digital Circuits by Exploiting a Fast Gate Sizing Scheme

Mohsen Raji, M. Amin Sabet, Behnam Ghavami. Soft Error Reliability Improvement of Digital Circuits by Exploiting a Fast Gate Sizing Scheme. IEEE Access, 7:66485-66495, 2019. [doi]

@article{RajiSG19,
  title = {Soft Error Reliability Improvement of Digital Circuits by Exploiting a Fast Gate Sizing Scheme},
  author = {Mohsen Raji and M. Amin Sabet and Behnam Ghavami},
  year = {2019},
  doi = {10.1109/ACCESS.2019.2902505},
  url = {https://doi.org/10.1109/ACCESS.2019.2902505},
  researchr = {https://researchr.org/publication/RajiSG19},
  cites = {0},
  citedby = {0},
  journal = {IEEE Access},
  volume = {7},
  pages = {66485-66495},
}