An FPGA Based Hardware Accelerator for Classification of Handwritten Digits - researchr publication authors

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R. Gautham Sundar Ram, Nitin Chaturvedi, Sumeet Saurav, Sanjay Singh. An FPGA Based Hardware Accelerator for Classification of Handwritten Digits. In Ajith Abraham, Aswani Kumar Cherukuri, Patricia Melin, Niketa Gandhi, editors, Intelligent Systems Design and Applications - 18th International Conference on Intelligent Systems Design and Applications, ISDA 2018, Vellore, India, December 6-8, 2018, Volume 1. Volume 940 of Advances in Intelligent Systems and Computing, pages 945-954, Springer, 2018. [doi]

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