Transistor Sizing for Parameter Obfuscation of Analog Circuits Using Satisfiability Modulo Theory

Vaibhav Venugopal Rao, Ioannis Savidis. Transistor Sizing for Parameter Obfuscation of Analog Circuits Using Satisfiability Modulo Theory. In 2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018, Chengdu, China, October 26-30, 2018. pages 102-106, IEEE, 2018. [doi]

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