Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache

Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh S. Dasika, Eric D. Marsman, Robert M. Senger, Scott A. Mahlke, Richard B. Brown. Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache. In 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 20-23 March 2005, San Jose, CA, USA. pages 179-190, IEEE Computer Society, 2005. [doi]

@inproceedings{RavindranNDMSMB05,
  title = {Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache},
  author = {Rajiv A. Ravindran and Pracheeti D. Nagarkar and Ganesh S. Dasika and Eric D. Marsman and Robert M. Senger and Scott A. Mahlke and Richard B. Brown},
  year = {2005},
  doi = {10.1109/CGO.2005.13},
  url = {http://doi.ieeecomputersociety.org/10.1109/CGO.2005.13},
  tags = {caching, compiler},
  researchr = {https://researchr.org/publication/RavindranNDMSMB05},
  cites = {0},
  citedby = {0},
  pages = {179-190},
  booktitle = {3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 20-23 March 2005, San Jose, CA, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2298-X},
}