Pedro Reviriego, Salvatore Pontarelli, Anees Ullah, Ali Zahir, Giuseppe Bianchi 0001. Multiple Hash Matching Units (MHMU): An Algorithmic Ternary Content Addressable Memory Design for Field Programmable Gate Arrays. In IEEE 19th International Conference on High Performance Switching and Routing, HPSR 2018, Bucharest, Romania, June 18-20, 2018. pages 1-6, IEEE, 2018. [doi]
@inproceedings{ReviriegoPUZ018,
title = {Multiple Hash Matching Units (MHMU): An Algorithmic Ternary Content Addressable Memory Design for Field Programmable Gate Arrays},
author = {Pedro Reviriego and Salvatore Pontarelli and Anees Ullah and Ali Zahir and Giuseppe Bianchi 0001},
year = {2018},
doi = {10.1109/HPSR.2018.8850764},
url = {https://doi.org/10.1109/HPSR.2018.8850764},
researchr = {https://researchr.org/publication/ReviriegoPUZ018},
cites = {0},
citedby = {0},
pages = {1-6},
booktitle = {IEEE 19th International Conference on High Performance Switching and Routing, HPSR 2018, Bucharest, Romania, June 18-20, 2018},
publisher = {IEEE},
isbn = {978-1-5386-7801-5},
}