Massimo Rigo, Caterina Travan, Francesca Vatta, Fulvio Babich. Implementation of a burst error and burst erasure channel emulator using an FPGA architecture. In Nikola Rozic, Dinko Begusic, editors, 22nd International Conference on Software, Telecommunications and Computer Networks, SoftCOM 2014, Split, Croatia, September 17-19, 2014. pages 414-418, IEEE, 2014. [doi]
No references recorded for this publication.
No citations of this publication recorded.