A PLL with loop bandwidth enhancement for low-noise and fast-settling clock recovery

Julien Roche, Wenceslas Rahadjandrabe, Lahkdar Zady, Gaëtan Bracmard, Daniele Fronte. A PLL with loop bandwidth enhancement for low-noise and fast-settling clock recovery. In 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, St. Julien's, Malta, August 31 2008-September 3, 2008. pages 802-805, IEEE, 2008. [doi]

Authors

Julien Roche

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Wenceslas Rahadjandrabe

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Lahkdar Zady

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Gaëtan Bracmard

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Daniele Fronte

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