Vanderlei Moraes Rodrigues, Flávio Rech Wagner. A Temporal Logic for Data-Flow VHDL. In Proceedings of the 11th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 1998, Rio de Janiero, Brazil, September 30 - October 2, 1998. pages 91-94, IEEE Computer Society, 1998. [doi]
@inproceedings{RodriguesW98-0,
title = {A Temporal Logic for Data-Flow VHDL},
author = {Vanderlei Moraes Rodrigues and Flávio Rech Wagner},
year = {1998},
url = {https://dl.acm.org/doi/10.5555/552517.829444},
researchr = {https://researchr.org/publication/RodriguesW98-0},
cites = {0},
citedby = {0},
pages = {91-94},
booktitle = {Proceedings of the 11th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 1998, Rio de Janiero, Brazil, September 30 - October 2, 1998},
publisher = {IEEE Computer Society},
isbn = {0-8186-8704-5},
}