A Chip for a Routing Table Based on a Novel Modified Trie Algorithm

D. Torres Roman, A. Larios, M. Guzman. A Chip for a Routing Table Based on a Novel Modified Trie Algorithm. VLSI Design, 2000(4):405-415, 2000. [doi]

@article{RomanLG00,
  title = {A Chip for a Routing Table Based on a Novel Modified Trie Algorithm},
  author = {D. Torres Roman and A. Larios and M. Guzman},
  year = {2000},
  doi = {10.1155/2000/81057},
  url = {https://doi.org/10.1155/2000/81057},
  researchr = {https://researchr.org/publication/RomanLG00},
  cites = {0},
  citedby = {0},
  journal = {VLSI Design},
  volume = {2000},
  number = {4},
  pages = {405-415},
}