VLSI design of a parallel architecture 2-D rank order filter

Roberto Roncella, Roberto Saletti, G. Savoia. VLSI design of a parallel architecture 2-D rank order filter. In 8th European Signal Processing Conference, EUSIPCO 1996, Trieste, Italy, 10-13 September, 1996. pages 1-4, IEEE, 1996. [doi]

@inproceedings{RoncellaSS96,
  title = {VLSI design of a parallel architecture 2-D rank order filter},
  author = {Roberto Roncella and Roberto Saletti and G. Savoia},
  year = {1996},
  url = {http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7082839},
  researchr = {https://researchr.org/publication/RoncellaSS96},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {8th European Signal Processing Conference, EUSIPCO 1996, Trieste, Italy, 10-13 September, 1996},
  publisher = {IEEE},
  isbn = {978-888-6179-83-6},
}