CMOS/STT-MRAM Based Ascon LWC: a Power Efficient Hardware Implementation

Nathan Roussel, Oliver Potin, Gregory di Pendina, Jean-Max Dutertre, Jean-Baptiste Rigaud. CMOS/STT-MRAM Based Ascon LWC: a Power Efficient Hardware Implementation. In 29th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2022, Glasgow, United Kingdom, October 24-26, 2022. pages 1-4, IEEE, 2022. [doi]

@inproceedings{RousselPPDR22,
  title = {CMOS/STT-MRAM Based Ascon LWC: a Power Efficient Hardware Implementation},
  author = {Nathan Roussel and Oliver Potin and Gregory di Pendina and Jean-Max Dutertre and Jean-Baptiste Rigaud},
  year = {2022},
  doi = {10.1109/ICECS202256217.2022.9971037},
  url = {https://doi.org/10.1109/ICECS202256217.2022.9971037},
  researchr = {https://researchr.org/publication/RousselPPDR22},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {29th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2022, Glasgow, United Kingdom, October 24-26, 2022},
  publisher = {IEEE},
  isbn = {978-1-6654-8823-5},
}