Harald Rueß. Hierarchical Verification of Two-Dimensional High-Speed Multiplication in PVS: A Case Study. In Mandayam K. Srivas, Albert John Camilleri, editors, Formal Methods in Computer-Aided Design, First International Conference, FMCAD 96, Palo Alto, California, USA, November 6-8, 1996, Proceedings. Volume 1166 of Lecture Notes in Computer Science, pages 79-93, Springer, 1996.
@inproceedings{Ruess96,
title = {Hierarchical Verification of Two-Dimensional High-Speed Multiplication in PVS: A Case Study},
author = {Harald Rueß},
year = {1996},
tags = {case study},
researchr = {https://researchr.org/publication/Ruess96},
cites = {0},
citedby = {0},
pages = {79-93},
booktitle = {Formal Methods in Computer-Aided Design, First International Conference, FMCAD 96, Palo Alto, California, USA, November 6-8, 1996, Proceedings},
editor = {Mandayam K. Srivas and Albert John Camilleri},
volume = {1166},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {3-540-61937-2},
}