A 40nm 650Mhz 0.5fJ/Bit/Search TCAM Compiler Using Complementary Bit-cell Architecture

Rashmi Sachan, Shahid Ali, Chandan Bist, Sunil Misra, Vinod Menezes, Sharad Gupta, Pat Bosshart. A 40nm 650Mhz 0.5fJ/Bit/Search TCAM Compiler Using Complementary Bit-cell Architecture. In 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, Pune, India, January 5-10, 2013. pages 55-59, IEEE, 2013. [doi]

@inproceedings{SachanABMMGB13,
  title = {A 40nm 650Mhz 0.5fJ/Bit/Search TCAM Compiler Using Complementary Bit-cell Architecture},
  author = {Rashmi Sachan and Shahid Ali and Chandan Bist and Sunil Misra and Vinod Menezes and Sharad Gupta and Pat Bosshart},
  year = {2013},
  doi = {10.1109/VLSID.2013.162},
  url = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2013.162},
  researchr = {https://researchr.org/publication/SachanABMMGB13},
  cites = {0},
  citedby = {0},
  pages = {55-59},
  booktitle = {26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, Pune, India, January 5-10, 2013},
  publisher = {IEEE},
  isbn = {978-1-4673-4639-9},
}