A Scalable and Efficient In-Memory Interconnect Architecture for Automata Processing

Elaheh Sadredini, Reza Rahimi, Vaibhav Verma, Mircea Stan, Kevin Skadron. A Scalable and Efficient In-Memory Interconnect Architecture for Automata Processing. Computer Architecture Letters, 18(2):87-90, 2019. [doi]

@article{SadrediniRVSS19,
  title = {A Scalable and Efficient In-Memory Interconnect Architecture for Automata Processing},
  author = {Elaheh Sadredini and Reza Rahimi and Vaibhav Verma and Mircea Stan and Kevin Skadron},
  year = {2019},
  doi = {10.1109/LCA.2019.2909870},
  url = {https://doi.org/10.1109/LCA.2019.2909870},
  researchr = {https://researchr.org/publication/SadrediniRVSS19},
  cites = {0},
  citedby = {0},
  journal = {Computer Architecture Letters},
  volume = {18},
  number = {2},
  pages = {87-90},
}