Static consistency checking for Verilog wire interconnects - Using dependent types to check the sanity of Verilog descriptions - researchr publication authors

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Cherif Salama, Gregory Malecha, Walid Taha, Jim Grundy, John O'Leary. Static consistency checking for Verilog wire interconnects - Using dependent types to check the sanity of Verilog descriptions. Higher-Order and Symbolic Computation, 24(1-2):81-114, 2011. [doi]

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Walid Taha

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