Real Number Modeling of a SAR ADC behavior using SystemVerilog

Christos Sapsanis, Martin Villemur, Andreas G. Andreou. Real Number Modeling of a SAR ADC behavior using SystemVerilog. In 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2022, Villasimius, Italy, June 12-15, 2022. pages 1-4, IEEE, 2022. [doi]

@inproceedings{SapsanisVA22,
  title = {Real Number Modeling of a SAR ADC behavior using SystemVerilog},
  author = {Christos Sapsanis and Martin Villemur and Andreas G. Andreou},
  year = {2022},
  doi = {10.1109/SMACD55068.2022.9816309},
  url = {https://doi.org/10.1109/SMACD55068.2022.9816309},
  researchr = {https://researchr.org/publication/SapsanisVA22},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2022, Villasimius, Italy, June 12-15, 2022},
  publisher = {IEEE},
  isbn = {978-1-6654-6703-2},
}