Two phase sinusoidal power clocked quasi-static adiabatic logic families

P. Sasipriya, V. S. Kanchana Bhaaskaran. Two phase sinusoidal power clocked quasi-static adiabatic logic families. In Manish Parashar, Tirumale Ramesh, Jaric Zola, Nanjangud C. Narendra, Kishore Kothapalli, J. Amudha, Purushotham Bangalore, Deepa Gupta, Animesh Pathak, Sanjay Chaudhary, K. V. Dinesha, Sushil K. Prasad, editors, Eighth International Conference on Contemporary Computing, IC3 2015, Noida, India, August 20-22, 2015. pages 503-508, IEEE Computer Society, 2015. [doi]

@inproceedings{SasipriyaB15,
  title = {Two phase sinusoidal power clocked quasi-static adiabatic logic families},
  author = {P. Sasipriya and V. S. Kanchana Bhaaskaran},
  year = {2015},
  doi = {10.1109/IC3.2015.7346734},
  url = {http://doi.ieeecomputersociety.org/10.1109/IC3.2015.7346734},
  researchr = {https://researchr.org/publication/SasipriyaB15},
  cites = {0},
  citedby = {0},
  pages = {503-508},
  booktitle = {Eighth International Conference on Contemporary Computing, IC3 2015, Noida, India, August 20-22, 2015},
  editor = {Manish Parashar and Tirumale Ramesh and Jaric Zola and Nanjangud C. Narendra and Kishore Kothapalli and J. Amudha and Purushotham Bangalore and Deepa Gupta and Animesh Pathak and Sanjay Chaudhary and K. V. Dinesha and Sushil K. Prasad},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4673-7948-9},
}