34.4Mbps 1.56Tbps/W DEFLATE Decompression Accelerator Featuring Block-Adaptive Huffman Decoder in 14nm Tri-Gate CMOS for IoT Platforms

Sudhir Satpathy, Sanu Mathew, Vikram Suresh, Vinodh Gopal, James Guilford, Mark Anders, Himanshu Kaul, Amit Agarwal, Steven Hsu, Kam Krisnnamurthy. 34.4Mbps 1.56Tbps/W DEFLATE Decompression Accelerator Featuring Block-Adaptive Huffman Decoder in 14nm Tri-Gate CMOS for IoT Platforms. In 44th IEEE European Solid State Circuits Conference, ESSCIRC 2018, Dresden, Germany, September 3-6, 2018. pages 90-93, IEEE, 2018. [doi]

@inproceedings{SatpathyMSGGAKA18,
  title = {34.4Mbps 1.56Tbps/W DEFLATE Decompression Accelerator Featuring Block-Adaptive Huffman Decoder in 14nm Tri-Gate CMOS for IoT Platforms},
  author = {Sudhir Satpathy and Sanu Mathew and Vikram Suresh and Vinodh Gopal and James Guilford and Mark Anders and Himanshu Kaul and Amit Agarwal and Steven Hsu and Kam Krisnnamurthy},
  year = {2018},
  doi = {10.1109/ESSCIRC.2018.8494238},
  url = {https://doi.org/10.1109/ESSCIRC.2018.8494238},
  researchr = {https://researchr.org/publication/SatpathyMSGGAKA18},
  cites = {0},
  citedby = {0},
  pages = {90-93},
  booktitle = {44th IEEE European Solid State Circuits Conference, ESSCIRC 2018, Dresden, Germany, September 3-6, 2018},
  publisher = {IEEE},
  isbn = {978-1-5386-5404-0},
}