Performance analysis of single-bit full adder cells using 0.18, 0.25, and 0.35 µm CMOS technologies

Mohammed Sayed, Wael M. Badawy. Performance analysis of single-bit full adder cells using 0.18, 0.25, and 0.35 µm CMOS technologies. In ISCAS (4). pages 559-562, 2002. [doi]

@inproceedings{SayedB02,
  title = {Performance analysis of single-bit full adder cells using 0.18, 0.25, and 0.35 µm CMOS technologies},
  author = {Mohammed Sayed and Wael M. Badawy},
  year = {2002},
  doi = {10.1109/ISCAS.2002.1010285},
  url = {http://doi.ieeecomputersociety.org/10.1109/ISCAS.2002.1010285},
  tags = {analysis},
  researchr = {https://researchr.org/publication/SayedB02},
  cites = {0},
  citedby = {0},
  pages = {559-562},
  booktitle = {ISCAS (4)},
}