Architecture-Level Power Optimization - What Are the Limits?

John S. Seng, Dean M. Tullsen. Architecture-Level Power Optimization - What Are the Limits?. J. Instruction-Level Parallelism, 7, 2005. [doi]

@article{SengT05,
  title = {Architecture-Level Power Optimization - What Are the Limits?},
  author = {John S. Seng and Dean M. Tullsen},
  year = {2005},
  url = {http://www.jilp.org/vol7/v7paper4.pdf},
  researchr = {https://researchr.org/publication/SengT05},
  cites = {0},
  citedby = {0},
  journal = {J. Instruction-Level Parallelism},
  volume = {7},
}