The following publications are possibly variants of this publication:
- IP Core Steganography Using Switch Based Key-Driven Hash-Chaining and Encoding for Securing DSP Kernels Used in CE SystemsMahendra Rathor, Anirban Sengupta. tce, 66(3):251-260, 2020. [doi]
- Designing Low Cost Secured DSP Core using Steganography and PSO for CE systemsAditya Anshul, K. Bharath, Anirban Sengupta. ifip5-5 2022: 95-100 [doi]
- Multilevel Watermark for Protecting DSP Kernel in CE Systems [Hardware Matters]Dipanjan Roy, Anirban Sengupta. cem, 8(2):100-102, 2019. [doi]
- Securing IP Cores in CE Systems using Key-driven Hash-chaining based SteganographyMahendra Rathor, Pallabi Sarkar, Vipul Kumar Mishra, Anirban Sengupta. icce-berlin 2020: 1-4 [doi]
- Hardware Steganography for IP Core Protection of Fault Secured DSP CoresAnirban Sengupta, Gargi Gupta, Harshit Jalan. icce-berlin 2019: 1-6 [doi]
- Palmprint Biometric Versus Encrypted Hash Based Digital Signature for Securing DSP Cores Used in CE SystemsRahul Chaurasia, Aditya Anshul, Anirban Sengupta, Shikha Gupta. cem, 11(5):73-80, 2022. [doi]
- Embedding Digital Signature Using Encrypted-Hashing for Protection of DSP Cores in CEAnirban Sengupta, E. Ranjith Kumar, N. Prajwal Chandra. tce, 65(3):398-407, 2019. [doi]
- Design Pruning of DSP Kernel for Multi Objective IP Core ArchitectureAnirban Sengupta. iccel 2019: 1-5 [doi]
- Retinal Biometric for Securing JPEG-Codec Hardware IP Core for CE SystemsRahul Chaurasia, Anirban Sengupta. tce, 69(3):441-457, August 2023. [doi]