Leveraging Hardware QoS to Control Contention in the Xilinx Zynq UltraScale+ MPSoC

Alejandro Serrano-Cases, Juan M. Reina, Jaume Abella 0001, Enrico Mezzetti, Francisco J. Cazorla. Leveraging Hardware QoS to Control Contention in the Xilinx Zynq UltraScale+ MPSoC. In Björn B. Brandenburg, editor, 33rd Euromicro Conference on Real-Time Systems, ECRTS 2021, July 5-9, 2021, Virtual Conference. Volume 196 of LIPIcs, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 2021. [doi]

@inproceedings{Serrano-CasesR021,
  title = {Leveraging Hardware QoS to Control Contention in the Xilinx Zynq UltraScale+ MPSoC},
  author = {Alejandro Serrano-Cases and Juan M. Reina and Jaume Abella 0001 and Enrico Mezzetti and Francisco J. Cazorla},
  year = {2021},
  doi = {10.4230/LIPIcs.ECRTS.2021.3},
  url = {https://doi.org/10.4230/LIPIcs.ECRTS.2021.3},
  researchr = {https://researchr.org/publication/Serrano-CasesR021},
  cites = {0},
  citedby = {0},
  booktitle = {33rd Euromicro Conference on Real-Time Systems, ECRTS 2021, July 5-9, 2021, Virtual Conference},
  editor = {Björn B. Brandenburg},
  volume = {196},
  series = {LIPIcs},
  publisher = {Schloss Dagstuhl - Leibniz-Zentrum für Informatik},
  isbn = {978-3-95977-192-4},
}