The following publications are possibly variants of this publication:
- A Simple Scheme for Slot Reuse without Latency in Dual BusOran Sharon, Adrian Segall. phsn 1993: 103-118
- On the Efficiency of Slot Reuse in the Dual Bus ConfigurationOran Sharon, Adrian Segall. infocom 1994: 758-765
- On the efficiency of slot reuse in the Dual Bus configurationOran Sharon, Adrian Segall. ton, 2(1):89-100, 1994. [doi]
- On the Relation between Bit Delay for Slot Reuse and the Number of Address Bits in the Dual Bus Configuration (Brief Announcement)Oran Sharon. podc 1997: 294
- On the Relation Between Bit Delay for Slot Reuse and the Number of Address Bits in the Dual-Bus ConfigurationOran Sharon. TIT, 45(1):356-365, 1999.
- On the relation between the throughput gain with slot reuse and the number of address bits in the dual bus configuration Part 1: Maximum throughputOran Sharon, Alexander Vainshtein, Anatoly Likholat. csse, 17(4/5):223-236, 2002.
- On the relation between the throughput gain with slot reuse and the number of address bits in the dual bus configuration Part 2: Linear and equal throughputsOran Sharon, Anatoly Likholat. csse, 17(4/5):237-251, 2002.
- Schemes for slot reuse in CRMAOran Sharon, Adrian Segall. ton, 2(3):269-278, 1994. [doi]