Md Jubayer Shawon, Vishal Saxena. Rapid Simulation of Photonic Integrated Circuits using Verilog-A Compact Models. In Hoi Lee, Randall L. Geiger, editors, 62nd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2019, Dallas, TX, USA, August 4-7, 2019. pages 424-427, IEEE, 2019. [doi]
@inproceedings{ShawonS19,
title = {Rapid Simulation of Photonic Integrated Circuits using Verilog-A Compact Models},
author = {Md Jubayer Shawon and Vishal Saxena},
year = {2019},
doi = {10.1109/MWSCAS.2019.8885372},
url = {https://doi.org/10.1109/MWSCAS.2019.8885372},
researchr = {https://researchr.org/publication/ShawonS19},
cites = {0},
citedby = {0},
pages = {424-427},
booktitle = {62nd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2019, Dallas, TX, USA, August 4-7, 2019},
editor = {Hoi Lee and Randall L. Geiger},
publisher = {IEEE},
isbn = {978-1-7281-2788-0},
}