Saeideh Sheikhpur, Mahdi Taheri, Mohammad Saeed Ansari, Ali Mahani 0001. Strengthened 32-bit AES implementation: Architectural error correction configuration with a new voting scheme. IET Computers & Digital Techniques, 15(6):395-408, 2021. [doi]
@article{SheikhpurTA021,
title = {Strengthened 32-bit AES implementation: Architectural error correction configuration with a new voting scheme},
author = {Saeideh Sheikhpur and Mahdi Taheri and Mohammad Saeed Ansari and Ali Mahani 0001},
year = {2021},
doi = {10.1049/cdt2.12031},
url = {https://doi.org/10.1049/cdt2.12031},
researchr = {https://researchr.org/publication/SheikhpurTA021},
cites = {0},
citedby = {0},
journal = {IET Computers & Digital Techniques},
volume = {15},
number = {6},
pages = {395-408},
}