Leakage power optimization for clock network using dual-Vth technology

Weixiang Shen, Yici Cai, Xianlong Hong. Leakage power optimization for clock network using dual-Vth technology. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 2769-2772, IEEE, 2008. [doi]

@inproceedings{ShenCH08:0,
  title = {Leakage power optimization for clock network using dual-Vth technology},
  author = {Weixiang Shen and Yici Cai and Xianlong Hong},
  year = {2008},
  doi = {10.1109/ISCAS.2008.4542031},
  url = {http://dx.doi.org/10.1109/ISCAS.2008.4542031},
  tags = {optimization},
  researchr = {https://researchr.org/publication/ShenCH08%3A0},
  cites = {0},
  citedby = {0},
  pages = {2769-2772},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA},
  publisher = {IEEE},
}