S. M. Yasser Sherazi, Peter Nilsson, Henrik Sjöland, Joachim Neves Rodrigues. A 100-fJ/cycle sub-VT decimation filter chain in 65 nm CMOS. In 19th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2012, Seville, Spain, December 9-12, 2012. pages 448-451, IEEE, 2012. [doi]
@inproceedings{SheraziNSR12,
title = {A 100-fJ/cycle sub-VT decimation filter chain in 65 nm CMOS},
author = {S. M. Yasser Sherazi and Peter Nilsson and Henrik Sjöland and Joachim Neves Rodrigues},
year = {2012},
doi = {10.1109/ICECS.2012.6463654},
url = {http://dx.doi.org/10.1109/ICECS.2012.6463654},
researchr = {https://researchr.org/publication/SheraziNSR12},
cites = {0},
citedby = {0},
pages = {448-451},
booktitle = {19th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2012, Seville, Spain, December 9-12, 2012},
publisher = {IEEE},
isbn = {978-1-4673-1259-2},
}