A Sub-ps Integrated-Jitter 10 GHz ADPLL with Fractional Capacitor

Linqi Shi, Weixin Gai, Jichao Huang, Liangxiao Tang, Xiao-xiang. A Sub-ps Integrated-Jitter 10 GHz ADPLL with Fractional Capacitor. In IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy. pages 1-4, IEEE, 2018. [doi]

@inproceedings{ShiGHTX18,
  title = {A Sub-ps Integrated-Jitter 10 GHz ADPLL with Fractional Capacitor},
  author = {Linqi Shi and Weixin Gai and Jichao Huang and Liangxiao Tang and Xiao-xiang},
  year = {2018},
  doi = {10.1109/ISCAS.2018.8351292},
  url = {https://doi.org/10.1109/ISCAS.2018.8351292},
  researchr = {https://researchr.org/publication/ShiGHTX18},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy},
  publisher = {IEEE},
  isbn = {978-1-5386-4881-0},
}