Katsuhiko Shimabukuro, Michitaka Kameyama. Fine-Grain Pipelined Reconfigurable VLSI Architecture Based on Multiple-Valued Multiplexer Logic. In 47th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2017, Novi Sad, Serbia, May 22-24, 2017. pages 19-24, IEEE Computer Society, 2017. [doi]
@inproceedings{ShimabukuroK17,
title = {Fine-Grain Pipelined Reconfigurable VLSI Architecture Based on Multiple-Valued Multiplexer Logic},
author = {Katsuhiko Shimabukuro and Michitaka Kameyama},
year = {2017},
doi = {10.1109/ISMVL.2017.45},
url = {https://doi.org/10.1109/ISMVL.2017.45},
researchr = {https://researchr.org/publication/ShimabukuroK17},
cites = {0},
citedby = {0},
pages = {19-24},
booktitle = {47th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2017, Novi Sad, Serbia, May 22-24, 2017},
publisher = {IEEE Computer Society},
isbn = {978-1-5090-5496-1},
}