A platform for visualizing digital circuit synthesis with VHDL - researchr publication authors

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Abdulhadi Shoufan, Zheng Lu, Guido Rößling. A platform for visualizing digital circuit synthesis with VHDL. In Reyyan Ayfer, John Impagliazzo, Cary Laxer, editors, Proceedings of the 15th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, ITiCSE 2010, Bilkent, Ankara, Turkey, June 26-30, 2010. pages 294-298, ACM, 2010. [doi]

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