READY: A Fine-Grained Multithreading Overlay Framework for Modern CPU-FPGA Dataflow Applications

Lucas Bragança da Silva, Ricardo S. Ferreira, Michael Canesche, Marcelo M. Menezes, Maria D. Vieira, Jeronimo Costa Penha, Peter Jamieson, José Augusto Miranda Nacif. READY: A Fine-Grained Multithreading Overlay Framework for Modern CPU-FPGA Dataflow Applications. ACM Trans. Embedded Comput. Syst., 18(5s), 2019. [doi]

@article{SilvaFCMVPJN19,
  title = {READY: A Fine-Grained Multithreading Overlay Framework for Modern CPU-FPGA Dataflow Applications},
  author = {Lucas Bragança da Silva and Ricardo S. Ferreira and Michael Canesche and Marcelo M. Menezes and Maria D. Vieira and Jeronimo Costa Penha and Peter Jamieson and José Augusto Miranda Nacif},
  year = {2019},
  doi = {10.1145/3358187},
  url = {https://doi.org/10.1145/3358187},
  researchr = {https://researchr.org/publication/SilvaFCMVPJN19},
  cites = {0},
  citedby = {0},
  journal = {ACM Trans. Embedded Comput. Syst.},
  volume = {18},
  number = {5s},
}