Raghvendra Singh, Shyam Akashe. Modeling and Analysis of Low Power 10 T Full Adder with Reduced Ground Bounce noise. Journal of Circuits, Systems, and Computers, 23(1), 2014. [doi]
@article{SinghA14-0,
title = {Modeling and Analysis of Low Power 10 T Full Adder with Reduced Ground Bounce noise},
author = {Raghvendra Singh and Shyam Akashe},
year = {2014},
doi = {10.1142/S0218126614500054},
url = {http://dx.doi.org/10.1142/S0218126614500054},
researchr = {https://researchr.org/publication/SinghA14-0},
cites = {0},
citedby = {0},
journal = {Journal of Circuits, Systems, and Computers},
volume = {23},
number = {1},
}