Case studies on variation tolerant and low power design using planar asymmetric double gate transistor

Amrinder Singh, Jiang Hu. Case studies on variation tolerant and low power design using planar asymmetric double gate transistor. In IEEE 57th International Midwest Symposium on Circuits and Systems, MWSCAS 2014, College Station, TX, USA, August 3-6, 2014. pages 1021-1024, IEEE, 2014. [doi]

@inproceedings{SinghH14-0,
  title = {Case studies on variation tolerant and low power design using planar asymmetric double gate transistor},
  author = {Amrinder Singh and Jiang Hu},
  year = {2014},
  doi = {10.1109/MWSCAS.2014.6908591},
  url = {https://doi.org/10.1109/MWSCAS.2014.6908591},
  researchr = {https://researchr.org/publication/SinghH14-0},
  cites = {0},
  citedby = {0},
  pages = {1021-1024},
  booktitle = {IEEE 57th International Midwest Symposium on Circuits and Systems, MWSCAS 2014, College Station, TX, USA, August 3-6, 2014},
  publisher = {IEEE},
  isbn = {978-1-4799-4134-6},
}