Algorithms for low power hardware synthesis from Concurrent Action Oriented Specifications (CAOS) - researchr publication related

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Gaurav Singh, Sandeep K. Shukla. Algorithms for low power hardware synthesis from Concurrent Action Oriented Specifications (CAOS). IJES, 3(1/2):83-92, 2007. [doi]

The following publications are possibly variants of this publication:

Low Power Hardware Synthesis from Concurrent Action-Oriented SpecificationsGaurav Singh, Sandeep Kumar Shukla. Springer, 2010. [doi]

Techniques for Power-Aware Hardware Synthesis from Concurrent Action Oriented SpecificationsGaurav Singh, Jacob B. Schwartz, Sumit Ahuja, Sandeep K. Shukla. jolpe, 3(2):156-166, 2007. [doi]

A Formally Verified Peak-Power Reduction Technique for Hardware Synthesis from Concurrent Action-Oriented SpecificationsGaurav Singh, Jacob B. Schwartz, Sandeep K. Shukla. jolpe, 5(2):135-144, 2009. [doi]

Complexity of Scheduling in Synthesizing Hardware from Concurrent Action Oriented SpecificationsGaurav Singh, S. S. Ravi, Sumit Ahuja, Sandeep K. Shukla. Dagstuhl 2007: [doi]

Low-power hardware synthesis from TRS-based specificationsGaurav Singh, Sandeep K. Shukla. memocode 2006: 49-58 [doi]

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