Rawat Siripokarpirom, Friedrich Mayer-Lindenberg. Hardware-Assisted Simulation and Evaluation of IP Cores Using FPGA-Based Rapid Prototyping Boards. In 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland. pages 96-102, IEEE Computer Society, 2004. [doi]
@inproceedings{SiripokarpiromM04,
title = {Hardware-Assisted Simulation and Evaluation of IP Cores Using FPGA-Based Rapid Prototyping Boards},
author = {Rawat Siripokarpirom and Friedrich Mayer-Lindenberg},
year = {2004},
doi = {10.1109/RSP.2004.23},
url = {http://doi.ieeecomputersociety.org/10.1109/RSP.2004.23},
tags = {rule-based},
researchr = {https://researchr.org/publication/SiripokarpiromM04},
cites = {0},
citedby = {0},
pages = {96-102},
booktitle = {15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland},
publisher = {IEEE Computer Society},
isbn = {0-7695-2159-2},
}