Exploring the Limits of Port Reduction in Centralized Register Files

Sandeep Sirsi, Aneesh Aggarwal. Exploring the Limits of Port Reduction in Centralized Register Files. In VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009. pages 535-540, IEEE, 2009. [doi]

@inproceedings{SirsiA09,
  title = {Exploring the Limits of Port Reduction in Centralized Register Files},
  author = {Sandeep Sirsi and Aneesh Aggarwal},
  year = {2009},
  doi = {10.1109/VLSI.Design.2009.29},
  url = {http://dx.doi.org/10.1109/VLSI.Design.2009.29},
  researchr = {https://researchr.org/publication/SirsiA09},
  cites = {0},
  citedby = {0},
  pages = {535-540},
  booktitle = {VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009},
  publisher = {IEEE},
  isbn = {978-0-7695-3506-7},
}