Timing characterization of clock buffers for clock tree synthesis

Can Sitik, Scott Lerner, Baris Taskin. Timing characterization of clock buffers for clock tree synthesis. In 32nd IEEE International Conference on Computer Design, ICCD 2014, Seoul, South Korea, October 19-22, 2014. pages 230-236, IEEE, 2014. [doi]

Authors

Can Sitik

This author has not been identified. Look up 'Can Sitik' in Google

Scott Lerner

This author has not been identified. Look up 'Scott Lerner' in Google

Baris Taskin

This author has not been identified. Look up 'Baris Taskin' in Google