Hybrid compiler/hardware prefetching for multiprocessors using low-overhead cache miss traps

Jonas Skeppstedt, Michel Dubois. Hybrid compiler/hardware prefetching for multiprocessors using low-overhead cache miss traps. In 1997 International Conference on Parallel Processing (ICPP 97), August 11-15, 1997, Bloomington, IL, USA, Proceedings. pages 298-305, IEEE Computer Society, 1997. [doi]

@inproceedings{SkeppstedtD97,
  title = {Hybrid compiler/hardware prefetching for multiprocessors using low-overhead cache miss traps},
  author = {Jonas Skeppstedt and Michel Dubois},
  year = {1997},
  url = {http://www.computer.org/proceedings/icpp/8108/81080298abs.htm},
  tags = {caching, compiler},
  researchr = {https://researchr.org/publication/SkeppstedtD97},
  cites = {0},
  citedby = {0},
  pages = {298-305},
  booktitle = {1997 International Conference on Parallel Processing (ICPP  97), August 11-15, 1997, Bloomington, IL, USA, Proceedings},
  publisher = {IEEE Computer Society},
  isbn = {0-8186-8108-X},
}