Ales Smrcka, Tomás Vojnar. Verifying Parametrised Hardware Designs Via Counter Automata. In Karen Yorav, editor, Hardware and Software: Verification and Testing, Third International Haifa Verification Conference, HVC 2007, Haifa, Israel, October 23-25, 2007, Proceedings. Volume 4899 of Lecture Notes in Computer Science, pages 51-68, Springer, 2007. [doi]
@inproceedings{SmrckaV07,
title = {Verifying Parametrised Hardware Designs Via Counter Automata},
author = {Ales Smrcka and Tomás Vojnar},
year = {2007},
doi = {10.1007/978-3-540-77966-7_8},
url = {http://dx.doi.org/10.1007/978-3-540-77966-7_8},
researchr = {https://researchr.org/publication/SmrckaV07},
cites = {0},
citedby = {0},
pages = {51-68},
booktitle = {Hardware and Software: Verification and Testing, Third International Haifa Verification Conference, HVC 2007, Haifa, Israel, October 23-25, 2007, Proceedings},
editor = {Karen Yorav},
volume = {4899},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {978-3-540-77964-3},
}