System-Level Design Techniques for Throughput and Power Optimization of Multiprocessor SoC Architectures

Krishnan Srinivasan, Nagender Telkar, Vijay Ramamurthi, Karam S. Chatha. System-Level Design Techniques for Throughput and Power Optimization of Multiprocessor SoC Architectures. In 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), Emerging Trends in VLSI Systems Design, 19-20 February 2004, Lafayette, LA, USA. pages 39-45, IEEE Computer Society, 2004. [doi]

@inproceedings{SrinivasanTRC04,
  title = {System-Level Design Techniques for Throughput and Power Optimization of Multiprocessor SoC Architectures},
  author = {Krishnan Srinivasan and Nagender Telkar and Vijay Ramamurthi and Karam S. Chatha},
  year = {2004},
  url = {http://csdl.computer.org/comp/proceedings/isvlsi/2004/2097/00/20970039abs.htm},
  tags = {optimization, architecture, design},
  researchr = {https://researchr.org/publication/SrinivasanTRC04},
  cites = {0},
  citedby = {0},
  pages = {39-45},
  booktitle = {2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), Emerging Trends in VLSI Systems Design, 19-20 February 2004, Lafayette, LA, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2097-9},
}